Samsung Electronics introduced a new generation of artificial intelligence memory technology on August 4, 2026, seeking to reinforce its chipmaking lead in the booming AI market. The world's largest memory chip manufacturer unveiled its V10 Bonding V-NAND, or BV-NAND, prototype at the Future of Memory and Storage (FMS) conference in Santa Clara, California. The chip features more than 400 layers and a new wafer-bonding architecture to increase storage density and boost performance. According to the latest reports, the BV-NAND increases memory density by approximately 58% compared with the previous V9 NAND, while also improving read, write, and input/output performance to support higher-capacity, more energy-efficient AI systems. As per Reuters, the company's BV-NAND technology increases memory density by about 58% from its previous V9 NAND while improving read, write and input/output performance to meet growing demand from AI systems requiring higher-capacity and more power-efficient storage. This announcement comes 13 years after the company introduced the industry's first V-NAND technology at the 2013 Flash Memory Summit, marking another milestone in Samsung's NAND innovation journey.
AI workloads have expanded beyond training large language models to the process of generating answers to user queries, creating increased demand for high-capacity NAND memory. NAND flash memory is used to store data such as photos, videos and applications in devices including smartphones, making it essential for AI applications that require large-scale data processing and storage. The growing demand for large-capacity memory for artificial intelligence workloads has been a key driver behind Samsung's development of the V10 BV-NAND technology. Looking ahead, Samsung expects long-term customer agreements to account for between 60% and 70% of memory sales in the future, reflecting the company's strategic focus on AI memory solutions. As per Samsung Global Newsroom, the company is focusing on the development of AI memory, expecting its new solutions to deliver higher data-storage density and greater energy efficiency in future artificial intelligence systems.
Beyond the V10 BV-NAND prototype, Samsung also demonstrated concept models described as the industry's first zHBM and zNAND-O architectures. Unlike traditional high-bandwidth memory, which is placed alongside AI accelerators, zHBM stacks memory vertically above the artificial intelligence accelerators. This arrangement reduces data-transfer distances, increases bandwidth, and lowers energy consumption. According to Reuters, Samsung's zHBM stacks memory vertically above AI accelerators to reduce the distance data travels, increasing bandwidth while improving energy efficiency. Samsung's zHBM stacks memory vertically above AI accelerators to reduce the physical distance data has to travel, offering faster processing and better power efficiency for AI training and inference workloads. The company claims a next-gen interface built around zHBM could hit roughly eight times the performance of HBM5, while memory density climbs past 10 times thanks to new wafer bonding technology. Energy efficiency reportedly triples too, and thermal resistance drops by more than half. zHBM presents a new memory architecture that vertically stacks HBM directly above AI accelerators, moving beyond conventional designs in which HBM is positioned alongside the processor. A next-generation interface system incorporating zHBM is expected to deliver approximately eight times the performance of HBM5. With next-generation wafer bonding technology, zHBM can achieve more than 10 times the memory density of HBM5 while enhancing energy efficiency threefold and reducing thermal resistance by more than half. zHBM also supports customer-specific designs, enabling customized IP to be integrated into the interlayer between the memory and AI accelerator to expand memory capacity and enhance accelerator performance.
Samsung showcased its comprehensive AI memory and storage portfolio at FMS 2026, including HBM4E, HBM5, LPDDR5X-PIM and PM1763 solutions. Following the industry's first mass production of HBM4 using its 1c DRAM and 4-nanometer (nm) base die technologies in February, Samsung was the first to begin shipping HBM4E samples to global customers in May, reinforcing its leadership in next-generation HBM. The company also introduced LPDDR5X-PIM, the industry's first LPDDR memory with processing-in-memory technology, built to perform data processing within the memory itself to improve the efficiency of both data movement and power. As per Samsung Global Newsroom, the company's latest enterprise storage solutions, including the PM1763 and BM1773, are designed to meet the growing storage demands of AI data centers. Samsung's Memory Business executives Jin-Yub Lee and Kyungryun Kim delivered a keynote titled "Driving the Wave of AI Revolution: 3D Innovations in Memory & Storage Architecture" at FMS 2026, presenting the company's vision to maximize AI system performance and power efficiency while addressing the rapidly growing demands of high-performance computing (HPC) and AI infrastructure. As the world's only integrated device manufacturer (IDM) with industry-leading capabilities spanning memory, foundry and advanced packaging, Samsung presented its end-to-end strategy for next-generation AI infrastructure, which provides customers with one-stop turnkey solutions supporting the evolving needs of the AI era.
